My ICASSP 2016 Schedule
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Paper Detail
| Paper: | DISPS-P1.8 |
| Session: | Implementation of Communication Systems |
| Session Time: | Wednesday, March 23, 08:30 - 10:30 |
| Presentation Time: | Wednesday, March 23, 08:30 - 10:30 |
| Presentation: |
Poster
|
| Topic: |
Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization |
| Paper Title: |
AN OPTIMUM ARCHITECTURE FOR CONTINUOUS-FLOW PARALLEL BIT REVERSAL |
| Authors: |
Chen Cheng; Zhejiang University | | |
| | Feng Yu; Zhejiang University | | |
