| Paper: | DISPS-P2.1 |
| Session: | Algorithms and Implementations of Signal Processing Systems |
| Location: | Poster Area I |
| Session Time: | Thursday, March 24, 08:30 - 10:30 |
| Presentation Time: | Thursday, March 24, 08:30 - 10:30 |
| Presentation: |
Poster
|
| Topic: |
Design and Implementation of Signal Processing Systems: System-on-chip architectures for signal processing |
| Paper Title: |
Work-efficient parallel non-maximum suppression for embedded GPU architectures |
| Authors: |
David Oro, Carles Fernandez, Herta Security, Spain; Xavier Martorell, Universitat Politecnica de Catalunya/Barcelona Supercomputing Center, Spain; Javier Hernando, Universitat Politecnica de Catalunya, Spain |
