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My ICASSP 2017 Schedule

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Paper Detail

Paper:DISPS-P1.1
Session:Design and Implementation of Signal Processing Systems II
Session Time:Thursday, March 9, 13:30 - 15:30
Presentation Time:Thursday, March 9, 13:30 - 15:30
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Low-power signal processing techniques and architectures
Paper Title: Energy Reduction Opportunities in an HEVC Real-Time Encoder
Authors: Alexandre Mercat; IETR 
 Florian Arrestier; IETR 
 Wassim Hamidouche; IETR 
 Maxime Pelcat; IETR 
 Daniel Menard; IETR