Paper: | DISPS-P1.7 |
Session: | Design and Implementation of Signal Processing Systems II |
Location: | Churchill: Poster Area G |
Session Time: | Thursday, March 9, 13:30 - 15:30 |
Presentation Time: | Thursday, March 9, 13:30 - 15:30 |
Presentation: |
Poster
|
Topic: |
Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization |
Paper Title: |
MULTIPLE PARALLEL BRANCH WITH FOLDING ARCHITECTURE FOR MULTICHANNEL FILTERED-X LEAST MEAN SQUARE ALGORITHM |
Authors: |
Dongyuan Shi, Jianjun He, Chuang Shi, Tatsuya Murao, Woon-Seng Gan, Nanyan Technology University, Singapore |