Technical Program

Paper Detail

Paper:DISPS-P1.1
Session:Design and Implementation of Signal Processing Systems II
Location:Churchill: Poster Area G
Session Time:Thursday, March 9, 13:30 - 15:30
Presentation Time:Thursday, March 9, 13:30 - 15:30
Presentation: Poster
Topic: Design and Implementation of Signal Processing Systems: Low-power signal processing techniques and architectures
Paper Title: Energy Reduction Opportunities in an HEVC Real-Time Encoder
Authors: Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard, IETR, France