| Paper: | DISPS-P1.2 |
| Session: | Design and Implementation of Signal Processing Systems II |
| Location: | Churchill: Poster Area G |
| Session Time: | Thursday, March 9, 13:30 - 15:30 |
| Presentation Time: | Thursday, March 9, 13:30 - 15:30 |
| Presentation: |
Poster
|
| Topic: |
Design and Implementation of Signal Processing Systems: DSP algorithm implementation in hardware and software |
| Paper Title: |
Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders |
| Authors: |
Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Menard, IETR, France |