Technical Program

Times and locations subject to change.

Click on a session's title to view the contents of the session.

Sunday Morning, May 23
08:30 - 11:30
Tutorial: TUT-1: Design of Continuous-Time Filters from 0.1 Hz to 2.0 GHz Junior Ballroom C
Tutorial: TUT-4: Low Power Video Platforms for Mobile Applications Port McNeil
All Day Sunday, May 23
08:30 - 16:15
Tutorial: TUT-9: Microsystems and Nanotechnology Through Applications Port Alberni
Tutorial: TUT-10: Ultrawideband Radio Communications Junior Ballroom D
Sunday Afternoon, May 23
13:15 - 16:15
Tutorial: TUT-5: Design for Testability of Analog and Mixed-Signal Integrated Circuits Junior Ballroom C
Tutorial: TUT-6: Clocking and Synchronization issues in sub-100nm System on Chip (SoC) Designs Junior Ballroom A
Tutorial: TUT-7: Cryptography: Circuits and Systems Approach Junior Ballroom B
Tutorial: TUT-8: CMOS Imagers: From Phototransduction to Image Processing Port McNeil
Sunday, May 23 2004
16:30 - 18:00
Forum: FORUM-1: New Era of Technology Junior Ballroom
Monday, May 24
08:00 - 09:00
Plenary: Genomic Signal Processing Grand Ballroom
09:30 - 11:00
ASP-L1: Pipelined ADC Grand Ballroom A
ASP-L2: Analog Filtering Techniques I Grand Ballroom B
ASP-L3: Voltage References Grand Ballroom C
COMM-L1: Communication Architectures Grand Ballroom D
VLSI-L1: Low Power Circuits and Architecture Junior Ballroom A/B
VLSI-L2: Video Junior Ballroom C
DSP-L1: FIR Digital Filters Junior Ballroom D
PSEC-L1: Power Integrated Circuits Finback
CAD-L1: Placement and Routing I Galiano
NLCS-L1: Oscillators Design and Implementation Granville
SEN-L1: Image Sensors I Orca
MMSA-L1: Advanced Multimedia Systems: End-to-End Frameworks Port Alberni
Invited Session: INV-1: Spiking Neural Networks I Port Hardy
Invited Session: INV-2: Ultra Wideband Systems Port McNeill
COMM-P1: Communication Architectures and Systems I Poster Area 1
CAD-P1: CAD for Analog and Mixed Signal Circuits Poster Area 2
DSP-P1: Digital Filters Poster Area 3
DSP-P2: Digital Signal Processing I Poster Area 4
ASP-P1: Analog Circuits in Systems I Poster Area 5
ASP-P2: Analog Circuits in Systems II Poster Area 6
VSPC-P1: 3-D and Image Processing Poster Area 7
MMSA-P1: Data Hiding and Watermarking Techiques for Multimedia Systems Poster Area 8
MMSA-P2: Intelligent Processing Techniques for Multimedia Systems and Applications Poster Area 9
VLSI-P1: Low Power Design and Implementation I Poster Area 10
11:15 - 12:45
ASP-L4: Pipelined and Folded ADC Grand Ballroom A
ASP-L5: Analog Filtering Techniques II Grand Ballroom B
ASP-L6: Broadband and UWB circuits Grand Ballroom C
COMM-L2: CDMA Systems Grand Ballroom D
VLSI-L3: Low Power Arithmetic Junior Ballroom A/B
VLSI-L4: MPEG Junior Ballroom C
DSP-L2: IIR Digital Filters Junior Ballroom D
PSEC-L2: Power Converter Control Finback
CAD-L2: Placement and Routing II Galiano
NLCS-L2: PLLs Design, Implementation and Application Granville
SEN-L2: Vision Sensors Orca
MMSA-L2: Multimedia Watermarking and Data Hiding Port Alberni
Invited Session: INV-3: Spiking Neural Networks II Port Hardy
Invited Session: INV-4: Multirate Systems for Communications Port McNeill
COMM-P2: Communication Circuits Design I Poster Area 1
CAD-P2: CAD for Digital Circuits Poster Area 2
DSP-P3: Digital Filters and Filter Banks Poster Area 3
DSP-P4: Digital Signal Processing II Poster Area 4
NLCS-P1: Nonlinear Circuits Analysis and Design I Poster Area 5
NLCS-P2: Nonlinear Circuits Analysis and Design II Poster Area 6
VSPC-P2: General Image and Video Processing I Poster Area 7
MMSA-P3: Communication and Coding Techniques for Multimedia Systems Poster Area 8
MMSA-P4: VLSI/SOC Implementation for Multimidia Sytems II Poster Area 9
VLSI-P2: Low Power Design and Implementation II Poster Area 10
14:15 - 15:45
ASP-L7: Flash ADC Grand Ballroom A
ASP-L8: Analog Signal Processing I Grand Ballroom B
ASP-L9: Oscillators Grand Ballroom C
COMM-L3: Ultra Wide Band Systems Grand Ballroom D
VLSI-L5: Low Power Buses and Circuits Junior Ballroom A/B
VLSI-L6: Image Processing Junior Ballroom C
DSP-L3: Digital Filters Junior Ballroom D
PSEC-L3: Power Amplifiers Finback
CAD-L3: Analog Modeling, Synthesis & Optimization I Galiano
NLCS-L3: Chaos-based Methodologies for Security Granville
SEN-L3: Mems and Sensory Systems Orca
MMSA-L3: Multimedia Database and Retrieval Systems Port Alberni
ASP-L10: Circuit Theory in Electronics Port Hardy
Invited Session: INV-5: Digital Signal Processing for Smart Multi-Media Systems Port McNeill
COMM-P3: Computation Kernels and IP for Communication Systems I Poster Area 1
CAD-P3: Testing, Verification, and Simulation Poster Area 2
DSP-P5: Discrete-Time Transforms and Wavelets Poster Area 3
DSP-P6: Digital Signal Processing III Poster Area 4
CNN-P1: Circuit Design for Array Computers Poster Area 5
ASP-P3: Controlled Amplifiers Poster Area 6
ASP-P4: Current Amplifiers Poster Area 7
ASP-P5: Analog Filtering I Poster Area 8
ASP-P6: Analog Filtering II Poster Area 9
VSPC-P3: General Image and Video Processing II Poster Area 10
16:00 - 17:30
ASP-L11: CMOS ADC Grand Ballroom A
ASP-L12: Analog Signal Processing II Grand Ballroom B
ASP-L13: Mixed Signal Testing Grand Ballroom C
COMM-L4: Oscillator Design Grand Ballroom D
VLSI-L7: Low Power Codes and Cryptography Junior Ballroom A/B
VLSI-L8: Coding Junior Ballroom C
DSP-L4: Digital Filter Banks Junior Ballroom D
PSEC-L4: Multilevel Power Converters Finback
CAD-L4: Analog Modeling, Synthesis & Optimization II Galiano
ASP-L14: General Circuit Theory Granville
SEN-L4: Chemical, Acoustic, Olfactory and Neuromorphic Sensors Orca
MMSA-L4: Multimedia Communication and Transmission Port Alberni
Invited Session: INV-6: Silicon Implementations of CNN and Programmable Mixed-Signal Vision I Port Hardy
Invited Session: INV-7: Nonlinear Dynamics and Complexity in Network Traffic Modeling and Control Port McNeill
Monday, May 24 2004
17:45 - 19:15
Forum: FORUM-2: The Future of Circuits and Systems Junior Ballroom
Tuesday, May 25
08:00 - 09:00
Plenary: CNN Technology for Brain-like Spatial-Temporal Sensory Computing - Present and Future Grand Ballroom
09:30 - 11:00
ASP-L15: Current-Steering DAC Grand Ballroom A
ASP-L16: Bioinspired Circuits Grand Ballroom B
ASP-L17: Voltage and Current Sources I Grand Ballroom C
COMM-L5: Phase Locked Loops (PLL) Circuits and Architectures Grand Ballroom D
VLSI-L9: High Performance Low Power Junior Ballroom A/B
VLSI-L10: Arithmetic Junior Ballroom C
DSP-L5: Digital Signal Processing Applications I Junior Ballroom D
PSEC-L5: Systems Theory for Power Finback
CAD-L5: Digital Circuits Synthesis & Optimization Galiano
NLCS-L4: Nonlinear Dynamics and Chaos in Communications I: Modulation and Coding Granville
VSPC-L1: Motion Estimation Orca
MMSA-L5: Multimedia Coding and Segmentation Port Alberni
Invited Session: INV-8: Bionics and Theory of Cellular Neural Networks Port Hardy
Invited Session: INV-9: Current Challenges in Mixed-Signal/RF Design and CAD Port McNeill
VLSI-P3: Video IP Cores Poster Area 1
CAD-P4: New Ideas in Physical Design Poster Area 2
NSA-P1: Neural Systems and Applications II Poster Area 3
SEN-P1: Network Sensors and MEMS Poster Area 4
VSPC-P4: Image and Video Compression Poster Area 5
DSP-P7: Digital Signal Processing for Communications Poster Area 6
ASP-P7: Analog Circuits and Technology I Poster Area 7
ASP-P8: Analog Circuits and Technology II Poster Area 8
VLSI-P5: VLSI Architectures Poster Area 9
VLSI-P4: Arithmetic Module Implementation Poster Area 10
11:15 - 12:45
ASP-L18: Digital-to-Analog Converters Grand Ballroom A
ASP-L19: Design Techniques for ASP Grand Ballroom B
ASP-L20: Voltage and Current Sources II Grand Ballroom C
COMM-L6: Decoding for Communication Systems Grand Ballroom D
VLSI-L11: SoC Design Technology Junior Ballroom A/B
VLSI-L12: Adders and Multipliers Junior Ballroom C
DSP-L6: Digital Signal Processing Applications II Junior Ballroom D
CNN-L1: Bio-inspired and Neuromorphic Array Computers Finback
CAD-L6: Mixed Signal Circuit and Device Modeling Galiano
NLCS-L5: Nonlinear Dynamics and Chaos in Communications II: Coding and Traffic Granville
VSPC-L2: Video over Networks Orca
MMSA-L6: Multimedia Understanding and Recognition Port Alberni
Invited Session: INV-10: Frequency-Response Masking Techniques Port Hardy
Invited Session: INV-11: Recent Advances in the Control of Power Electronics Port McNeill
COMM-P4: Communication Circuits Design II Poster Area 1
PSEC-P2: Control of Power Converters Poster Area 2
PSEC-P3: Power Electronics Circuits Poster Area 3
SEN-P2: Neuromorhic and Sensory Systems Poster Area 4
BIO-P1: Biomedical Circuits and Systems I Poster Area 5
DSP-P8: Digital Signal Processing IV Poster Area 6
ASP-P9: Testing of Mixed Signal Circuits Poster Area 7
ASP-P10: Mixed Signal and Sensor Interface Circuits Poster Area 8
PSEC-P4: Analysis of Power Systems Poster Area 9
PSEC-P1: Power Electronics and Systems Poster Area 10
14:15 - 15:45
ASP-L21: Sigma-Delta Converters I Grand Ballroom A
ASP-L22: Filter Applications Grand Ballroom B
ASP-L23: Sensor Interface Circuits Grand Ballroom C
COMM-L7: Circuits for Communications Grand Ballroom D
VLSI-L13: Noise in Digital Circuits Junior Ballroom A/B
VLSI-L14: Turbo and Viterbi Algorithms Junior Ballroom C
DSP-L7: Multidimensional Signal Processing I Junior Ballroom D
CNN-L2: Implementation of CNNs and Array Computers Finback
CAD-L7: Interconnect and Clock Distribution Galiano
NLCS-L6: Nonlinear Circuits Modelling Granville
VSPC-L3: Transcoding Orca
MMSA-L7: Multimedia Systems and Applications: Advanced Techniques Port Alberni
Invited Session: INV-12: Information Assurance and Data Hiding I Port Hardy
DSP-L8: Adaptive Signal Processing I Port McNeill
COMM-P5: Computation Kernels and IP for Communication Systems II Poster Area 1
NSA-P2: Neural Network Circuits and Systems II Poster Area 2
VLSI-P7: Arithmetic and Cryptography Poster Area 3
SEN-P3: Image Sensors II Poster Area 4
DSP-P9: Digital Signal Processing V Poster Area 5
ASP-P11: RF Circuits I Poster Area 6
ASP-P12: RF Circuits II Poster Area 7
NLCS-P3: Nonlinear Circuits and Systems Analysis and Application I Poster Area 8
NLCS-P4: Nonlinear Circuits and Systems Analysis and Application II Poster Area 9
VLSI-P6: Arithmetic and DSP Implementation Poster Area 10
16:00 - 17:30
ASP-L24: Sigma-Delta Converters II Grand Ballroom A
ASP-L25: High Gain Amplifiers Grand Ballroom B
ASP-L26: Mixed Signal Circuits Grand Ballroom C
COMM-L8: Optical Communication Grand Ballroom D
VLSI-L15: Interconnect Junior Ballroom A/B
VLSI-L16: Cryptography Junior Ballroom C
DSP-L9: Multidimensional Signal Processing II Junior Ballroom D
CNN-L3: Complex Spatio-temporal Dynamics in Multi-layer CNNs Finback
CAD-L8: Fundamentals of CAD Algorithms Galiano
NLCS-L7: Modelling and Analysis of Nonlinear Systems Granville
VSPC-L4: Advanced Video Coding Orca
MMSA-L8: VLSI/SOC Implementation for Multimedia Systems I Port Alberni
Invited Session: INV-13: Heterogeneous Systems Port Hardy
DSP-L10: Adaptive Signal Processing II Port McNeill
Wednesday, May 26
08:00 - 09:00
Plenary: Practical Applications of 3-D and 4-D Filters Grand Ballroom
09:30 - 11:00
ASP-L27: ADC Circuits Grand Ballroom A
ASP-L28: High Speed Amplifiers Grand Ballroom B
ASP-L29: RF Frontend Circuits Grand Ballroom C
COMM-L9: Frequency Synthesizers Grand Ballroom D
VLSI-L17: I/O Circuits Junior Ballroom A/B
VLSI-L18: Field Programmable and Reconfigurable Junior Ballroom C
DSP-L11: Digital Signal Processing Junior Ballroom D
CNN-L4: Analysis and Applications of CNNs Finback
CAD-L9: Verification, Testing, and Validation Galiano
NLCS-L8: Nonlinear Circuits Analysis and Design Granville
VSPC-L5: Encoder Optimization Orca
BIO-L1: Implantable Electronics Port Alberni
Invited Session: INV-14: Advances in Speech Processing with Applications Port Hardy
DSP-L12: Digital Signal Processing for Communications I Port McNeill
COMM-P6: Wireless Systems and High Speed Systems Poster Area 1
ASP-P13: Analog Circuits I Poster Area 2
ASP-P14: Analog Circuits II Poster Area 3
ASP-P15: High-Frequency Amplifiers II Poster Area 4
ASP-P16: Data Converters II Poster Area 5
ASP-P17: Data Converters III Poster Area 6
BSP-P1: Blind Signal Processing II Poster Area 7
VLSI-P9: FPGA and PLA Poster Area 8
VLSI-P10: Image Processing and Implementation Poster Area 9
VLSI-P8: Circuit Design I Poster Area 10
11:15 - 12:45
ASP-L30: Analog-to-Digital Converters Grand Ballroom A
ASP-L31: High-Frequency Amplifiers I Grand Ballroom B
ASP-L32: RF Power Amplifiers Grand Ballroom C
COMM-L10: Receivers Architecture and Design Grand Ballroom D
VLSI-L19: Clocking Junior Ballroom A/B
VLSI-L20: Memory Junior Ballroom C
DSP-L13: Implementation of DSP Algorithms Junior Ballroom D
NSA-L1: Neural Network Algorithms and Architectures Finback
CAD-L10: New Areas in CAD I Galiano
NLCS-L9: Switching Circuits and Systems: Bifurcation Analysis and Control Granville
VSPC-L6: Scalable Video Coding Orca
BIO-L2: Medical Sensors and Amplifiers Port Alberni
Invited Session: INV-15: Behavioral Modeling and Analog and Mixed Signal Simulation Port Hardy
DSP-L14: Digital Signal Processing for Communications II Port McNeill
GTC-P1: Graph Algorithms and Applications II Poster Area 1
ASP-P18: Analog Circuits III Poster Area 2
ASP-P19: Analog Circuits IV Poster Area 3
CNN-P2: Applications of Cellular Neural Networks and Array Computers Poster Area 4
ASP-P20: Sigma-Delta Converters III Poster Area 5
ASP-P21: Sigma-Delta Converters IV Poster Area 6
BSP-P2: Blind Signal Processing III Poster Area 7
NEGS-P1: Nanoelectronics and Nanoarchitecture Poster Area 8
VLSI-P12: Array Architecture and SoC Poster Area 9
VLSI-P11: Circuit Design II Poster Area 10
14:15 - 15:45
ASP-L33: Data Converters I Grand Ballroom A
ASP-L34: Operational Amplifiers Grand Ballroom B
ASP-L35: Signal Processing Building Blocks I Grand Ballroom C
COMM-L11: RF Amplifiers for Communications Grand Ballroom D
VLSI-L21: Current-Mode and Sensing Junior Ballroom A/B
VLSI-L22: Flip-Flops Junior Ballroom C
DSP-L15: Discrete-Time Transforms and Wavelets Junior Ballroom D
NSA-L2: Neural Network Circuits and Systems I Finback
CAD-L11: New Areas in CAD II Galiano
NLCS-L10: Nonlinear Circuits and Arrays Granville
VSPC-L7: Video Processing Orca
BSP-L1: Blind Signal Processing I Port Alberni
Invited Session: INV-16: Nonlinearity: Complexity and Noise Port Hardy
DSP-L16: Audio and Speech Processing I Port McNeill
Invited Session: INV-18: Information Assurance and Data Hiding II Poster Area 1
Invited Session: INV-19: Silicon Implementations of CNN and Programmable Mixed-Signal Vision II Poster Area 2
BIO-P2: Biomedical Circuits and Systems II Poster Area 3
COMM-P7: Communication Architectures and Systems II Poster Area 4
COMM-P8: Circuits and Networks for Communications Poster Area 5
GTC-P2: Graph Algorithms and Applications III Poster Area 6
NEGS-P2: Modeling and Simulation Poster Area 7
NSA-P3: Neural Systems and Applications I Poster Area 8
VSPC-P5: Video Coding Poster Area 9
DSP-P10: Digital Signal Processing VI Poster Area 10
16:00 - 17:30
ASP-L36: Computer Analysis and Synthesis Grand Ballroom A
ASP-L37: Class AB amplifiers Grand Ballroom B
ASP-L38: Signal Processing Building Blocks II Grand Ballroom C
COMM-L13: RF Circuits and Systems Grand Ballroom D
VLSI-L23: Test, Verification and Signal Processing Junior Ballroom A/B
VLSI-L24: Frequency Synthesis, ESD Junior Ballroom C
DSP-L17: Detection and Estimation Junior Ballroom D
GTC-L1: Graph Algorithms and Applications I Finback
COMM-L12: Clock/Data Recovery Galiano
NLCS-L11: Applications of Nonlinear Circuits Granville
VSPC-L8: Image Compression Orca
NEGS-L1: Nanoelectronics and Gigascale Systems Port Alberni
Invited Session: INV-17: Blind Signal Processing: BSS and ICA Port Hardy
DSP-L18: Audio and Speech Processing II Port McNeill

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