Technical Program

Paper Detail

Paper:COMM-P2.2
Session:Communication Circuits Design I
Time:Monday, May 24, 11:15 - 12:45
Presentation: Poster
Topic: Circuits and Systems for Communications: RF & High-Frequency Circuits for Communications
Title: DESIGN AND COMPARISON OF CMOS CURRENT MODE LOGIC LATCHES
Authors: Muhammad Usama; Carleton University 
 Tadeusz Kwasniewski; Carleton University 
Abstract: A comprehensive study of the MOS Current Mode Logic (MCML) is presented. Operation of a conventional MCML latch is analyzed and some modified structures are described. A novel structure is proposed for increased stability with reduced delay parameters. General problems with single-ended to differential conversion are addressed. Comparative performance measures of Master-Slave (MS) latches are presented in a 0.18‑μm CMOS technology.
 
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