Technical Program

Paper Detail

Session:Interconnect and Clock Distribution
Time:Tuesday, May 25, 14:51 - 15:09
Presentation: Lecture
Topic: Computer-Aided Network Design: Interconnect and Clock Distribution
Authors: Nisar Ahmed; University of Texas, Dallas 
 Mohammad Tehranipour; University of Texas, Dallas 
 Dian Zhou; University of Texas, Dallas 
 Mehrdad Nourani; University of Texas, Dallas 
Abstract: Repeaters are now widely used to decrease delay and increase the performance of long interconnects. The maximum operating frequency is limited by the longest wire between two repeaters.The main goal of repeater insertion is to reduce the delay of the interconnects in a circuit. Increasing the number of repeaters on an interconnect increases the slew rate and the operating frequencybut decreases the design performance in terms of area and power. This paper presents a new methodology of repeater insertion considering the circuit operating frequency to improve the slew rate and reduce the area overhead of the repeaters. We propose a mathematical treatment for finding the number and position of repeaters while keeping the same size of the optimal repeatersize. Experimental results are shown for different frequencies and repeater sizes to indicate the improvements of slew rate and saving area overhead.

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