Technical Program

Paper Detail

Paper:VLSI-L16.1
Session:Cryptography
Time:Tuesday, May 25, 16:00 - 16:18
Presentation: Lecture
Topic: VLSI Systems and Applications: Digital VLSI Circuits
Title: A HIGH SPEED ASIC IMPLEMENTATION OF THE RIJNDAEL ALGORITHM
Authors: Refik Sever; TUBITAK-BILTEN 
 A. Neslin Ismailoglu; TÜBITAK-BILTEN 
 Yusuf Cagatay Tekmen; Middle East Technical University 
 Murat Askar; Middle East Technical University 
Abstract: In this study, a non-pipelined implementation of the Rijndael Algorithm [1], which is selected to be the new Advanced Encryption Algorithm (AES) [2] by the National Institute of Standards and Technology (NIST) [3] in October 2000, is presented. Both the encryption and the decryption algorithms of Rijndael are implemented on a single ASIC. Using 149K gates in a 0.35-?m standard CMOS process, we have reached a 132 MHz worst-case clock speed yielding 2.41 Gbit/s non-pipelined throughput in both encryption and decryption.
 
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