Technical Program

Paper Detail

Paper:CAD-L7.2
Session:Interconnect and Clock Distribution
Time:Tuesday, May 25, 14:33 - 14:51
Presentation: Lecture
Topic: Computer-Aided Network Design: Interconnect and Clock Distribution
Title: MATRIX PENCIL BASED REALIZABLE REDUCTION FOR DISTRIBUTED INTERCONNECTS
Authors: Janet Meiling Wang; University of Arizona 
 Omar Hafiz; University of Arizona 
Abstract: In this paper, we propose a realizable parasitic reduction method for RLGC distributed interconnects . The proposed method generates a reduced order model based on a modified matrix pencil method. By using a set of analytic formulas, this method provides synthesied RLGC elements. This new model is applied to power grid and antena circuits involving triangular input waveforms, lossy transmission lines and discontinuities of interconnects. The results show better reduction ratio than the standard macromodels and good accuracy compared with the theoretical values.
 
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