NEGS-P1: Nanoelectronics and Nanoarchitecture

Session Type: Poster
Time: Wednesday, May 26, 11:15 - 12:45
Location: Poster Area 8
Co-Chairs: Wolfgang Porod, University of Notre Dame and Wai-Chi Fang, NASA's Jet Propulsion Lab
 
NEGS-P1.1: ANALYSIS OF ANALOG TO DIGITAL CONVERTER BASED ON SINGLE-ELECTRON TUNNELING TRANSISTORS
         Chaohong Hu; Delft University of Technology, Netherlands / Shanghai Jiao Tong University
         Sorin Cotofana; Delft University of Technology
         Jianfei Jiang; Shanghai Jiao Tong University
 
NEGS-P1.2: PROGRAMMABLE LOGIC GATE BASED ON RESONANT TUNNELLING DEVICES
         José María Quintana; Centro Nacional de Microelectrónica (CNM)
         María José Avedillo; Centro Nacional de Microelectrónica (CNM)
         Héctor Pettenghi; Centro Nacional de Microelectrónica (CNM)
 
NEGS-P1.3: POWDER-BASED FABRICATION TECHNIQUES FOR SINGLE-WALL CARBON NANOTUBE CIRCUITS
         Daniel Dai; Northwestern University
         Yehea Ismail; Northwestern University
         Wei Wang; University of Western Ontario
         Hanif Ladak; University of Western Ontario, Robarts Institute
 
NEGS-P1.4: RESONANT TUNNELING DIODE BASED QMOS EDGE TRIGGERED FLIP-FLOP DESIGN
         Hui Zhang; University of Michigan
         Pinaki Mazumder; University of Michigan
         Kyounghoon Yang; KAIST
 
NEGS-P1.5: EFFECTIVENESS OF ENERGY RECOVERY TECHNIQUES IN REDUCING ON-CHIP POWER DENSITY IN MOLECULAR NANO-TECHNOLOGIES
         Myeong-Eun Hwang; Purdue University
         Arijit Raychowdhury; Purdue University
         Kaushik Roy; Purdue University
 

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