VLSI-P11: Circuit Design II

Session Type: Poster
Time: Wednesday, May 26, 11:15 - 12:45
Location: Poster Area 10
Chair: Mircea R. Stan, University of Virginia
 
VLSI-P11.1: FORWARD BODY BIASED KEEPER FOR ENHANCED NOISE IMMUNITY IN DOMINO LOGIC CIRCUITS
         Volkan Kursun; University of Rochester
         Eby G. Friedman; University of Rochester
 
VLSI-P11.2: MODELING AND DESIGNING ENERGY-DELAY OPTIMIZED WIDE DOMINO CIRCUITS
         Christine Kwong; University of Waterloo
         Bhaskar Chatterjee; University of Waterloo
         Manoj Sachdev; University of Waterloo
 
VLSI-P11.3: AN ALL-DIGITAL 50% DUTY-CYCLE CORRECTOR
         Yi-Ming Wang; Chung-Cheng University
         Jinn-Shyan Wang; Chung-Cheng University
 
VLSI-P11.4: DESIGN TECHNIQUES FOR PULSED STATIC CMOS
         Kavitha Seshadri; University of Minnesota
         Adrianne Pontarelli; University of Minnesota
         Gauri Joglekar; University of Minnesota
         Gerald Sobelman; University of Minnesota
 
VLSI-P11.5: A PHASE-ADJUSTABLE NEGATIVE PHASE SHIFTER USING A SINGLE-SHOT LOCKING METHOD
         Chua-Chin Wang; National Sun Yat-Sen University
         Ya-Hsin Hsueh; National Sun Yat-Sen University
         Sen-Fu Hong; National Sun Yat-Sen University
         Rong-Sui Kao; VIA Technologies, Inc.
 

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