COMM-L5: Phase Locked Loops (PLL) Circuits and Architectures

Session Type: Lecture
Time: Tuesday, May 25, 09:30 - 11:00
Location: Grand Ballroom D
Co-Chairs: John Uyemura, Georgia Tech and Raafat Mansour, University of Waterloo
 
COMM-L5.1: ON THE DESIGN OF AN OFFSET-PLL MODULATION LOOP FOR THE EGSM BAND
         Amr Hafez; Cairo University
         Waleed Aboueldahab; MEMSCAP Egypt
         Ahmed Helmy; MEMSCAP Egypt
 
COMM-L5.2: PHASE LOCKED LOOP GAIN SHAPING FOR GIGAHERTZ OPERATION
         Krzysztof Iniewski; Simon Fraser University
         Sebastian Magierowski; University of Toronto
         Marek Syrzycki; Simon Fraser University
 
COMM-L5.3: PHASE-LOCKED LOOP ARCHITECTURE FOR ADAPTIVE JITTER OPTIMIZATION
         Socrates Vamvakos; University of California, Berkeley
         Carl Werner; Rambus, Inc.
         Borivoje Nikolic; University of California, Berkeley
 
COMM-L5.4: FAST-SWITCHING ANALOG PLL WITH FINITE-IMPULSE RESPONSE
         Salvatore Levantino; Politecnico di Milano
         Luca RomanĂ²; Politecnico di Milano
         Carlo Samori; Politecnico di Milano
         Andrea Lacaita; Politecnico di Milano / IFN-CNR Sez. Milano
 
COMM-L5.5: A NOVEL ULTRA HIGH-SPEED FLIP-FLOP-BASED FREQUENCY DIVIDER
         Ravindran Mohanavelu; University of California, Irvine
         Payam Heydari; University of California, Irvine
 

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