VLSI-L19: Clocking

Session Type: Lecture
Time: Wednesday, May 26, 11:15 - 12:45
Location: Junior Ballroom A/B
Co-Chairs: Gaetano Palumbo, Universitá degli Studi di Catania and Massimo Alioto, University of Siena
 
VLSI-L19.1: EXPONENTIALLY TAPERED H-TREE CLOCK DISTRIBUTION NETWORKS
         Magdy El-Moursy; University of Rochester
         Eby G. Friedman; University of Rochester
 
VLSI-L19.2: A NEW MESOCHRONOUS CLOCKING SCHEME FOR SYNCHRONIZATION IN SOC
         Behzad Mesgarzadeh; Linköping University
         Christer Svensson; Linköping University
         Atila Alvandpour; Linköping University
 
VLSI-L19.3: THE IMPACT OF CLOCK GATING SCHEMES ON THE POWER DISSIPATION OF SYNTHESIZABLE REGISTER FILES
         Matthias Mueller; Hochschule Bremen
         Andreas Wortmann; Hochschule Bremen
         Sven Simon; Hochschule Bremen
         Michael Kugel; Infineon Technologies AG
         Tim Schoenauer; Infineon Technologies AG
 
VLSI-L19.4: LEAKAGE POWER REDUCTION FOR CLOCK GATING SCHEME ON PD-SOI
         Kazuki Fukuoka; Kobe University
         Masaaki Iijima; Kobe University
         Kenji Hamada; Kobe University
         Masahiro Numa; Kobe University
         Akira Tada; Renesas Technology Corp.
 
VLSI-L19.5: TIME BORROWING AND CLOCK SKEW SCHEDULING EFFECTS ON MULTI-PHASE LEVEL-SENSITIVE CIRCUITS
         Baris Taskin; University of Pittsburgh
         Ivan Kourtev; University of Pittsburgh
 

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