VLSI-L23: Test, Verification and Signal Processing

Session Type: Lecture
Time: Wednesday, May 26, 16:00 - 17:30
Location: Junior Ballroom A/B
Co-Chairs: Martin Margala, University of Rochester and Pinaki Mazumder, University of Michigan
 
VLSI-L23.1: MIXED RL-HUFFMAN ENCODING FOR POWER REDUCTION AND DATA COMPRESSION IN SCAN TEST
         Mohammad Tehranipour; University of Texas, Dallas
         Mehrdad Nourani; University of Texas, Dallas
         Karim Arabi; PMC Sierra
         Ali Afzali-Kusha; University of Tehran
 
VLSI-L23.2: ASSERTION-BASED ON-LINE VERIFICATION AND DEBUG ENVIRONMENT FOR COMPLEX HARDWARE SYSTEMS
         Kevin Peterson; École Polytechnique de Montréal
         Yvon Savaria; École Polytechnique de Montréal
 
VLSI-L23.3: LOW POWER PATTERN GENERATION FOR BIST ARCHITECTURE
         Nisar Ahmed; University of Texas, Dallas
         Mohammad Tehranipour; University of Texas, Dallas
         Mehrdad Nourani; University of Texas, Dallas
 
VLSI-L23.4: A DESIGN COMPLEXITY COMPARISON METHOD FOR LOOP-BASED SIGNAL PROCESSING ALGORITHMS: PARTICLE FILTERS
         Sangjin Hong; State University of New York at Stony Brook
         Miodrag Bolic; State University of New York at Stony Brook
         Petar Djuric; State University of New York at Stony Brook
 
VLSI-L23.5: AN EFFICIENT ARCHITECTURE FOR 1-D DISCRETE BIORTHOGONAL WAVELET TRANSFORM
         Isa Servan Uzun; Queen's University Belfast
         Abbes Amira; Queen's University Belfast
         Ahmed Bouridane; Queen's University Belfast
 

Home -||- Technical Program -||- Call for Participation -||- Paper Submission -||- Paper Review -||- Plenaries
Invited Sessions -||- Registration -||- Tutorials/Short Courses -||- Forums -||- Technical Program Committee
MySchedule -||- Exhibits -||- Housing -||- Information -||- Committee -||- Contact Us

©2021 Conference Management Services -||- email: organizers@iscas2004.org -||- Last updated Friday, August 17, 2012