NLCS-L2: PLLs Design, Implementation and Application

Session Type: Lecture
Time: Monday, May 24, 11:15 - 12:45
Location: Granville
Co-Chairs: Michael Green, University of California, Irvine and Geza Kolumban, Budapest University of Technology and Economics
 
NLCS-L2.1: MODELING, DESIGN AND CHARACTERIZATION OF A NEW LOW JITTER ANALOG DUAL TUNING LC-VCO PLL ARCHITECTURE
         Roberto Nonis; University of Udine
         Nicola Da Dalt; Infineon Technologies AG
         Pierpaolo Palestri; University of Udine
         Luca Selmi; University of Udine
 
NLCS-L2.2: SPECTRAL SHAPING BY GENERALIZED TRANSFER FUNCTION DESIGN IN FREQUENCY MODULATION SIGMA DELTA SYNTHESIZERS
         Soeren Sappok; RWTH Aachen
         Andre Kruth; RWTH Aachen
         Guerkan Ordu; RWTH Aachen
         Ralf Wunderlich; RWTH Aachen
         Stefan Heinen; RWTH Aachen
 
NLCS-L2.3: THE DESIGN OF A DIFFERENTIAL CMOS CHARGE PUMP FOR HIGH PERFORMANCE PHASE-LOCKED LOOPS
         Bortecene Terlemez; Georgia Institute of Technology
         John Uyemura; Georgia Institute of Technology
 
NLCS-L2.4: FREQUENCY SYNTHESIZER FOR ON-CHIP TESTING AND AUTOMATED TUNING
         Ari Y. Valero-López; Texas A&M University
         Alberto Valdes-Garcia; Texas A&M University
         Edgar Sánchez-Sinencio; Texas A&M University
 
NLCS-L2.5: AN ADPLL CIRCUIT USING A DDPS FOR GENLOCK APPLICATIONS
         Dorin Emil Calbaza; Gennum Corporation
         Ioan Cordos; Gennum Corporation
         Nigel Seth-Smith; Gennum Corporation
         Yvon Savaria; École Polytechnique de Montréal
 

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