CAD-L5: Digital Circuits Synthesis & Optimization

Session Type: Lecture
Time: Tuesday, May 25, 09:30 - 11:00
Location: Galiano
Co-Chairs: John Sewell, University of Glasgow and Sung Kyu Lim, Georgia Institute of Technology
 
CAD-L5.1: GENERATION OF DISJOINT CUBES FOR MULTIPLE-VALUED FUNCTIONS
         Bogdan Falkowski; Nanyang Technological University
         Cicilia Lozano; Nanyang Technological University
         Susanto Rahardja; Institute for Infocomm Research
 
CAD-L5.2: OUTPUT-PATTERN DIRECTED DECOMPOSITION FOR LOW POWER DESIGN
         Chi-Wei Hu; National Tsing Hua University
         TingTing Hwang; National Tsing Hua University
 
CAD-L5.3: FPGA IMPLEMENTATION OF CONTROLLER-DATAPATH PAIR IN CUSTOM IMAGE PROCESSOR DESIGN
         Hongtu Jiang; Lund University
         Viktor Öwall; Lund University
 
CAD-L5.4: LEAST LEAKAGE VECTOR ASSISTED TECHNOLOGY MAPPING FOR TOTAL POWER OPTIMIZATION
         Yi-Ching Au; Hong Kong University of Science and Technology
         Chi-Ying Tsui; Hong Kong University of Science and Technology
 
CAD-L5.5: A PREDICTIVE METHODOLOGY FOR ACCURATE SUBSTRATE PARASITIC EXTRACTION
         Ajit Sharma; Oregon State University
         Chenggang Xu; Oregon State University
         Wen Kung Chu; Cadence Design Systems
         Nishath Verghese; Cadence Design Systems
         Terri Fiez; Oregon State University
         Kartikeya Mayaram; Oregon State University
 

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