Technical Program

SDCRb.PC: Software Defined and Cognitive Radios II

Symposium: Software Defined and Cognitive Radios
Session Type: Poster
Time: Thursday, December 5, 16:00 - 18:00
Location: Poster Area C
 
SDCRb.PC.1: A GRAPHICAL APPROACH TO GPS SOFTWARE-DEFINED RECEIVER IMPLEMENTATION
         Zaher Kassas; The University of Texas at Austin
         Jahshan Bhatti; The University of Texas at Austin
         Todd Humphreys; The University of Texas at Austin
 
SDCRb.PC.2: A LABVIEW-BASED FAST PROTOTYPING SOFTWARE DEFINED GPS RECEIVER PLATFORM
         David Akopian; The University of Texas at San Antonio
         Arpine Soghoyan; The University of Texas at San Antonio
 
SDCRb.PC.3: EPUMA: A UNIQUE MEMORY ACCESS BASED PARALLEL DSP PROCESSOR FOR SDR AND CR
         Andréas Karlsson; Linköping University
         Joar Sohl; Linköping University
         Jian Wang; Linköping University
         Dake Liu; Linköping University
 
SDCRb.PC.4: PERFORMANCE EVALUATION OF LDPC DECODING ON A GENERAL PURPOSE MOBILE CPU
         Stefan Grönroos; Åbo Akademi University
         Jerker Björkqvist; Åbo Akademi University
 
SDCRb.PC.5: PIPELINED FFT FOR WIRELESS COMMUNICATIONS SUPPORTING 128-2048 / 1536 -POINT TRANSFORMS
         Inkeun Cho; University of Maryland
         Tomasz Patyk; Dolby Laboratories
         David Guevorkian; Nokia Siemens Networks
         Jarmo Takala; Tempere University of Technology
         Shuvra S. Bhattacharyya; University of Maryland
 
SDCRb.PC.6: SOFTWARE DEFINED FFT ARCHITECTURE FOR IEEE 802.11AC
         Peng Wang; Queen's University Belfast
         John McAllister; Queen's University Belfast
         Yun Wu; Queen's University Belfast
 
SDCRb.PC.7: HIGH PERFORMANCE REAL-TIME PRE-PROCESSING FOR FIXED-COMPLEXITY SPHERE DECODER
         Yun Wu; Queen's University Belfast
         John McAllister; Queen's University Belfast
         Peng Wang; Queen's University Belfast
 
SDCRb.PC.8: A PROCESSOR BASED MULTI-STANDARD LOW-POWER LDPC ENGINE FOR MULTI-GBPS WIRELESS COMMUNICATION
         Meng Li; IMEC
         Frederik Naessens; IMEC
         Min Li; IMEC
         Peter Debacker; IMEC
         Claude Desset; IMEC
         Praveen Raghavan; IMEC
         Antoine Dejonghe; IMEC
         Liesbet Van der Perre; IMEC
 
SDCRb.PC.9: HIGH THROUGHPUT LOW LATENCY LDPC DECODING ON GPU FOR SDR SYSTEMS
         Guohui Wang; Rice University
         Michael Wu; Rice University
         Bei Yin; Rice University
         Joseph R. Cavallaro; Rice University
 
SDCRb.PC.10: A CARRIER RECOVERY ARCHITECTURE FOR NEXT GENERATION WIDEBAND MODEMS
         Fred Harris; San Diego State University
         Xiaofei Chen; San Diego State University
         Elettra Venosa; San Diego State University
 
SDCRb.PC.11: A SDR ARCHITECTURE BASED ON FPGA FOR MULTI-STANDARD TRANSMITTER
         Benjamin Bautista Contreras; CINVESTAV-GDL
         Ramon Parra Michel; CINVESTAV-GDL
         Roberto Carrasco Alvarez; Universidad de Guadalajara
         Eduardo Romero Aguirre; Instituto tecnologico de Sonora
 
SDCRb.PC.12: SELECTIVE DECODING IN ASSOCIATIVE MEMORIES BASED ON SPARSE-CLUSTERED NETWORKS
         Hooman Jarollahi; McGill University
         Naoya Onizawa; McGill University
         Warren J. Gross; McGill University
 
SDCRb.PC.13: OPEN THE GATES: USING HIGH-LEVEL SYNTHESIS TOWARDS PROGRAMMABLE LDPC DECODERS ON FPGAS
         Frederico Pratas; INESC-ID, IST, Universidade de Lisboa
         Joao Andrade; Instituto de Telecomunicações, University of Coimbra
         Gabriel Falcao; Instituto de Telecomunicações, University of Coimbra
         Vitor Silva; Instituto de Telecomunicações, University of Coimbra
         Leonel Sousa; INESC-ID, IST, Universidade de Lisboa
 
SDCRb.PC.14: FROM OPENCL TO GATES: THE FFT
         Joao Andrade; Instituto de Telecomunicações, University of Coimbra
         Vitor Silva; Instituto de Telecomunicações, University of Coimbra
         Gabriel Falcao; Instituto de Telecomunicações, University of Coimbra
 
SDCRb.PC.15: SCALABLE SUCCESSIVE-CANCELLATION HARDWARE DECODER FOR POLAR CODES
         Alexandre J. Raymond; McGill University
         Warren J. Gross; McGill University
 
SDCRb.PC.16: TOWARDS ELASTIC SDR ARCHITECTURES USING DYNAMIC TASK MANAGEMENT
         Oliver Arnold; Technische Universität Dresden
         Emil Matus; Technische Universität Dresden
         Benedikt Nöthen; Technische Universität Dresden
         Friedrich Pauls; Technische Universität Dresden
         Gerhard Fettweis; Technische Universität Dresden
 
SDCRb.PC.17: ENHANCED PERFORMANCE IN WIDEBAND COGNITIVE RADIOS VIA COMPRESSIVE SENSING
         Sk. Alam; University of Genoa
         Lucio Marcenaro; University of Genoa
         Carlo Regazzoni; University of Genoa
 
SDCRb.PC.18: EFFICIENT RECONFIGURABLE SCHEME FOR THE RECOVERY OF SUB-NYQUIST SAMPLED SPARSE MULTI-BAND SIGNALS
         Anu Kalidas Muralidharan Pillai; Linköping University
         Håkan Johansson; Linköping University