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My Asilomar 2019 Schedule

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MP8a1: Architectures and Implementations

Session Type: Poster
Time: Monday, November 4, 13:30 - 15:10
Location: Merrill
Session Chair: Joseph R. Cavallaro, Rice University
 
  MP8a1-1: ASYNCHRONOUS STOCHASTIC COMPUTING
         Patricia Gonzalez-Guerrero; University of Virginia
         Mircea Stan; University of Virginia
 
  MP8a1-2: IMPLEMENTING FIRST-ORDER OPTIMIZATION METHODS: ALGORITHMIC CONSIDERATIONS AND BESPOKE MICROCONTROLLERS
         Xinwei Zhang; University of Minnesota
         John Sartori; University of Minnesota
         Mingyi Hong; University of Minnesota
         Sairaj Dhople; University of Minnesota
 
  MP8a1-3: A DESIGN FRAMEWORK FOR INVERTIBLE LOGIC
         Naoya Onizawa; Tohoku University
         Kaito Nishino; Tohoku University
         Sean Smithson; McGill University
         Brett Meyer; McGill University
         Warren Gross; McGill University
         Hitoshi Yamagata; Canon Medical Systems Corp.
         Hiroyuki Fujita; Canon Medical Systems Corp.
         Takahiro Hanyu; Tohoku University
 
  MP8a1-4: CONVERTING UNSTABLE CHALLENGES TO STABLE IN MUX-BASED PHYSICAL UNCLONABLE FUNCTIONS BY BIT-FLIPPING
         Anoop Koyily; University of Minnesota
         Keshab Parhi; University of Minnesota
 
  MP8a1-5: FIRST-THEN-SECOND EXTREMA SELECTION
         Ali Chamas Al Ghouwayel; Lebanese International University (LIU)
         Hassan Harb; University of South Brittany
         Emmanuel Boutillon; University of South Brittany
 
  MP8a1-6: NEURAL NETWORK DPD VIA BACKPROPAGATION THROUGH A NEURAL NETWORK MODEL OF THE PA
         Chance Tarver; Rice University
         Liwen Jiang; Rice University
         Aryan Sefidi; Rice University
         Joseph Cavallaro; Rice University
 
  MP8a1-7: FOURIER-BASED ERROR ANALYSIS FOR COMPUTING WITH ASYNCHRONOUS SIGMA-DELTA STREAMS
         Stephen Wilson; University of Virginia
         Patricia Gonzalez-Guerrero; University of Virginia
         Mircea Stan; University of Virginia
 
  MP8a1-8: PERFORMANCE EVALUATION OF A SUM ERROR DETECTION SCHEME FOR DECIMAL ARITHMETIC
         Clara Schaertl Short; University of Texas at Austin
         Earl E. Swartzlander, Jr.; University of Texas at Austin