Paper: | TA5a-1 | ||
Session: | Machine Learning and Hardware Aspects | ||
Session Time: | Tuesday, October 30, 08:15 - 09:55 | ||
Presentation Time: | Tuesday, October 30, 08:15 - 08:40 | ||
Presentation: | Oral | ||
Topic: | Architectures and Implementation: Architectures for Machine Learning | ||
Paper Title: | Efficient Reconfigurable Hardware Core for Convolutional Neural Networks | ||
Authors: | Haonan Wang; Nanjing University | ||
Jun Lin; Nanjing University | |||
Yi Xie; Rutgers University | |||
Bo Yuan; Rutgers University | |||
Zhongfeng Wang; Nanjing University |