| Paper: | TA5a-1 |
| Session: | Machine Learning and Hardware Aspects |
| Location: | Scripps |
| Session Time: | Tuesday, October 30, 08:15 - 09:55 |
| Presentation Time: | Tuesday, October 30, 08:15 - 08:40 |
| Presentation: |
Oral
|
| Topic: |
Architectures and Implementation: Architectures for Machine Learning |
| Paper Title: |
Efficient Reconfigurable Hardware Core for Convolutional Neural Networks |
| Authors: |
Haonan Wang, Jun Lin, Nanjing University, China; Yi Xie, Bo Yuan, Rutgers University, United States; Zhongfeng Wang, Nanjing University, China |